"Design-for-Test Techniques for Opens in Undetected Branches in CMOS ..."

Antonio Zenteno Ramírez, Guillermo Espinosa, Víctor H. Champac (2007)

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DOI: 10.1109/TVLSI.2007.896910

access: closed

type: Journal Article

metadata version: 2020-03-11

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  - https://dblp.org/rec/journals/tvlsi/RamirezEC07
Antonio Zenteno Ramírez, Guillermo Espinosa, Víctor H. Champac:
Design-for-Test Techniques for Opens in Undetected Branches in CMOS Latches and Flip-Flops. IEEE Trans. Very Large Scale Integr. Syst. 15(5): 572-577 (2007)

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