"Correction to "design of synchronous and asynchronous variable-latency ..."

Mauro Olivieri (2001)

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DOI: 10.1109/TVLSI.2001.931231

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type: Journal Article

metadata version: 2020-03-11

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Mauro Olivieri:
Correction to "design of synchronous and asynchronous variable-latency pipelined multipliers". IEEE Trans. Very Large Scale Integr. Syst. 9(4): 558-559 (2001)

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