"Design of synchronous and asynchronous variable-latency pipelined multipliers."

Mauro Olivieri (2001)

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DOI: 10.1109/92.924058

access: closed

type: Journal Article

metadata version: 2020-03-11

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Mauro Olivieri:
Design of synchronous and asynchronous variable-latency pipelined multipliers. IEEE Trans. Very Large Scale Integr. Syst. 9(2): 365-376 (2001)

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