"A Pipelined Parallel Hardware Architecture for 2-D Real-Time Electrical ..."

Mahmoud Méribout, Samir Teniou (2017)

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DOI: 10.1109/TVLSI.2016.2636184

access: closed

type: Journal Article

metadata version: 2023-09-30

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  - https://dblp.org/rec/journals/tvlsi/MeriboutT17
Mahmoud Méribout, Samir Teniou:
A Pipelined Parallel Hardware Architecture for 2-D Real-Time Electrical Capacitance Tomography Imaging Using Interframe Correlation. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1320-1328 (2017)

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