"Dynamic Statistical-Timing-Analysis-Based VLSI Path Delay Test Pattern ..."

Bao Liu, Lu Wang (2015)

> Home

Details and statistics

DOI: 10.1109/TVLSI.2014.2352937

access: closed

type: Journal Article

metadata version: 2023-12-21

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tvlsi/LiuW15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tvlsi/LiuW15
Bao Liu, Lu Wang:
Dynamic Statistical-Timing-Analysis-Based VLSI Path Delay Test Pattern Generation. IEEE Trans. Very Large Scale Integr. Syst. 23(9): 1577-1590 (2015)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.