"Reducing Power, Leakage, and Area of Standard-Cell ASICs Using Threshold ..."

Niranjan Kulkarni et al. (2016)

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DOI: 10.1109/TVLSI.2016.2527783

access: closed

type: Journal Article

metadata version: 2020-03-11

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Niranjan Kulkarni, Jinghua Yang, Jae-sun Seo, Sarma B. K. Vrudhula:
Reducing Power, Leakage, and Area of Standard-Cell ASICs Using Threshold Logic Flip-Flops. IEEE Trans. Very Large Scale Integr. Syst. 24(9): 2873-2886 (2016)

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