"VLSI considerations for TESH: a new hierarchical interconnection network ..."

Vijay K. Jain, S. Horiguchi (1998)

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DOI: 10.1109/92.711306

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type: Journal Article

metadata version: 2020-03-11

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Vijay K. Jain, S. Horiguchi:
VLSI considerations for TESH: a new hierarchical interconnection network for 3-D integration. IEEE Trans. Very Large Scale Integr. Syst. 6(3): 346-353 (1998)

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