"An architecture for a DSP field-programmable gate array."

M. Agarwala, Poras T. Balsara (1995)

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DOI: 10.1109/92.365460

access: closed

type: Journal Article

metadata version: 2020-03-11

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M. Agarwala, Poras T. Balsara:
An architecture for a DSP field-programmable gate array. IEEE Trans. Very Large Scale Integr. Syst. 3(1): 136-141 (1995)

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