"LBNoC: Design of Low-latency Router Architecture with Lookahead Bypass for ..."

Khyamling Parane, Prabhu B. M. Prasad, Basavaraj Talawar (2020)

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DOI: 10.1145/3365994

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type: Journal Article

metadata version: 2024-02-05

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Khyamling Parane, Prabhu B. M. Prasad, Basavaraj Talawar:
LBNoC: Design of Low-latency Router Architecture with Lookahead Bypass for Network-on-Chip Using FPGA. ACM Trans. Design Autom. Electr. Syst. 25(1): 9:1-9:26 (2020)

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