"Power minimization algorithms for LUT-based FPGA technology mapping."

Hao Li, Srinivas Katkoori, Wai-Kei Mak (2004)

> Home

Details and statistics

DOI: 10.1145/966137.966139

access: closed

type: Journal Article

metadata version: 2023-11-12

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/todaes/LiKM04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/todaes/LiKM04
Hao Li, Srinivas Katkoori, Wai-Kei Mak:
Power minimization algorithms for LUT-based FPGA technology mapping. ACM Trans. Design Autom. Electr. Syst. 9(1): 33-51 (2004)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.