"Self-checking logic design for FPGA implementation."

Parag K. Lala, Alfred L. Burress (2003)

> Home

Details and statistics

DOI: 10.1109/TIM.2003.818545

access: closed

type: Journal Article

metadata version: 2020-06-08

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tim/LalaB03
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tim/LalaB03
Parag K. Lala, Alfred L. Burress:
Self-checking logic design for FPGA implementation. IEEE Trans. Instrum. Meas. 52(5): 1391-1398 (2003)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.