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"An FPGA-Based Fault-Tolerant 2D Systolic Array for Matrix Multiplications."
Tadayoshi Horita, Itsuo Takanami (2011)
- Tadayoshi Horita, Itsuo Takanami:
An FPGA-Based Fault-Tolerant 2D Systolic Array for Matrix Multiplications. Trans. Comput. Sci. 13: 108-124 (2011)
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