![](https://dblp.uni-trier.de./img/logo.320x120.png)
![search dblp search dblp](https://dblp.uni-trier.de./img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de./img/search.dark.16x16.png)
default search action
"A Clock Distribution Scheme Insensitive to Supply Voltage Drift With ..."
Soyeong Shin et al. (2022)
- Soyeong Shin
, Yongjae Lee
, Jiheon Park
, Jihyo Kang
, Kyunghoon Kim, Dae-Han Kwon, Sangkwon Lee
, Jieun Jang
, Joo-Hwan Cho, Deog-Kyoon Jeong
:
A Clock Distribution Scheme Insensitive to Supply Voltage Drift With Self-Adjustment of Clock Buffer Delay. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 814-818 (2022)
![](https://dblp.uni-trier.de./img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.