"The Algorithm and VLSI Architecture of High-Throughput and Highly ..."

Ting-Yu Tsai et al. (2024)

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DOI: 10.1109/TCSI.2024.3390751

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type: Journal Article

metadata version: 2024-07-19

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Ting-Yu Tsai, Chung-An Shen, Tsung-Lin Wu, Yuan-Hao Huang:
The Algorithm and VLSI Architecture of High-Throughput and Highly Efficient Tensor Decomposition Engine. IEEE Trans. Circuits Syst. I Regul. Pap. 71(7): 3134-3145 (2024)

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