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"A Two-Cycle Lock-In Time ADPLL Design Based on a Frequency Estimation ..."
Chia-Tsun Wu et al. (2010)
- Chia-Tsun Wu, Wen-Chung Shen
, Wei Wang, An-Yeu Wu
:
A Two-Cycle Lock-In Time ADPLL Design Based on a Frequency Estimation Algorithm. IEEE Trans. Circuits Syst. II Express Briefs 57-II(6): 430-434 (2010)

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