"A 5-Gbit/s Clock- and Data-Recovery Circuit With 1/8-Rate Linear Phase ..."

Young-Suk Seo et al. (2009)

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DOI: 10.1109/TCSII.2008.2008520

access: closed

type: Journal Article

metadata version: 2020-05-27

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Young-Suk Seo, Jang-Woo Lee, Hong-Jung Kim, Changsik Yoo, Jae-Jin Lee, Chun-Seok Jeong:
A 5-Gbit/s Clock- and Data-Recovery Circuit With 1/8-Rate Linear Phase Detector in 0.18-μm CMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs 56-II(1): 6-10 (2009)

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