"Settling Time Optimization for Three-Stage CMOS Amplifier Topologies."

Andrea Pugliese et al. (2009)

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DOI: 10.1109/TCSI.2009.2017133

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type: Journal Article

metadata version: 2020-05-22

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Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo:
Settling Time Optimization for Three-Stage CMOS Amplifier Topologies. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(12): 2569-2582 (2009)

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