"A Current-Density Centric Logical Effort Delay and Power Model for ..."

Abhimanyu Kapoor, Yan Hu, Rizwan Bashirullah (2013)

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DOI: 10.1109/TCSI.2013.2244352

access: closed

type: Journal Article

metadata version: 2020-05-22

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Abhimanyu Kapoor, Yan Hu, Rizwan Bashirullah:
A Current-Density Centric Logical Effort Delay and Power Model for High-Speed CML Gates. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(10): 2618-2630 (2013)

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