"Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical ..."

Huai-Yi Hsu, An-Yeu Wu, Jih-Chiang Yeo (2006)

> Home

Details and statistics

DOI: 10.1109/TCSII.2006.882360

access: closed

type: Journal Article

metadata version: 2020-05-27

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcas/HsuWY06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcas/HsuWY06
Huai-Yi Hsu, An-Yeu Wu, Jih-Chiang Yeo:
Area-Efficient VLSI Design of Reed-Solomon Decoder for 10GBase-LX4 Optical Communication Systems. IEEE Trans. Circuits Syst. II Express Briefs 53-II(11): 1245-1249 (2006)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.