"Novel Bit-Reordering Circuit for Continuous-Flow Parallel FFT Architectures."

Gyanendra, Balasubramanian Raman, Brajesh Kumar Kaushik (2020)

> Home

Details and statistics

DOI: 10.1109/TCSII.2020.2984892

access: closed

type: Journal Article

metadata version: 2021-03-02

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcas/GyanendraRK20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcas/GyanendraRK20
Gyanendra, Balasubramanian Raman, Brajesh Kumar Kaushik:
Novel Bit-Reordering Circuit for Continuous-Flow Parallel FFT Architectures. IEEE Trans. Circuits Syst. 67-II(12): 3392-3396 (2020)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.