"A Versatile Variable Rate LDPC Codec Architecture."

Colm Fewer, Mark F. Flanagan, Anthony D. Fagan (2007)

> Home

Details and statistics

DOI: 10.1109/TCSI.2007.904641

access: closed

type: Journal Article

metadata version: 2020-05-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcas/FewerFF07
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcas/FewerFF07
Colm Fewer, Mark F. Flanagan, Anthony D. Fagan:
A Versatile Variable Rate LDPC Codec Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(10): 2240-2251 (2007)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.