"A bipartition-codec architecture to reduce power in pipelinedcircuits."

Shanq-Jang Ruan et al. (2001)

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DOI: 10.1109/43.908477

access: closed

type: Journal Article

metadata version: 2021-04-09

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Shanq-Jang Ruan, Rung-Ji Shang, Feipei Lai, Kun-Lin Tsai:
A bipartition-codec architecture to reduce power in pipelinedcircuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(2): 343-348 (2001)

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