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"Simultaneous Technology Mapping and Placement for Delay Minimization."

Yifang Liu, Rupesh S. Shelar, Jiang Hu (2011)

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DOI: 10.1109/TCAD.2010.2089569

access: closed

type: Journal Article

metadata version: 2020-09-24

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Yifang Liu, Rupesh S. Shelar, Jiang Hu:
Simultaneous Technology Mapping and Placement for Delay Minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(3): 416-426 (2011)

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