"Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted ..."

Qiang Liu et al. (2009)

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DOI: 10.1109/TCAD.2009.2013541

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type: Journal Article

metadata version: 2024-08-06

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Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung:
Combining Data Reuse With Data-Level Parallelization for FPGA-Targeted Hardware Compilation: A Geometric Programming Framework. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(3): 305-315 (2009)

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