


default search action
"Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Design."
Kyle Kuan, Tosiron Adegbija (2020)
- Kyle Kuan
, Tosiron Adegbija
:
Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(6): 1328-1339 (2020)

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.