"Chip Substrate Resistance Modeling Technique for Integrated Circuit Design."

Thomas A. Johnson et al. (1984)

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DOI: 10.1109/TCAD.1984.1270066

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type: Journal Article

metadata version: 2020-09-24

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Thomas A. Johnson, Ronald W. Knepper, Victor Marcello, Wen Wang:
Chip Substrate Resistance Modeling Technique for Integrated Circuit Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 3(2): 126-134 (1984)

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