"Concurrent error correction in systolic architectures."

Ronald J. Cosentino (1988)

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DOI: 10.1109/43.3139

access: closed

type: Journal Article

metadata version: 2020-09-24

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Ronald J. Cosentino:
Concurrent error correction in systolic architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7(1): 117-125 (1988)

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