"StereoEngine: An FPGA-Based Accelerator for Real-Time High-Quality Stereo ..."

Gang Chen et al. (2020)

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DOI: 10.1109/TCAD.2020.3012864

access: closed

type: Journal Article

metadata version: 2020-12-17

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Gang Chen, Yehua Ling, Tao He, Haitao Meng, Shengyu He, Yu Zhang, Kai Huang:
StereoEngine: An FPGA-Based Accelerator for Real-Time High-Quality Stereo Estimation With Binary Neural Network. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(11): 4179-4190 (2020)

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