"Test Chips With Scan-Based Logic Arrays."

Yu-Hsiang Chen, Chia-Ming Hsu, Kuen-Jong Lee (2021)

> Home

Details and statistics

DOI: 10.1109/TCAD.2020.3010478

access: closed

type: Journal Article

metadata version: 2021-04-29

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcad/ChenHL21
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcad/ChenHL21
Yu-Hsiang Chen, Chia-Ming Hsu, Kuen-Jong Lee:
Test Chips With Scan-Based Logic Arrays. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(4): 790-802 (2021)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.