"A Multiple Fault-Tolerant Processor Network Architecture for Pipeline ..."

Jerzy Tyszer (1988)

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DOI: 10.1109/12.8707

access: closed

type: Journal Article

metadata version: 2017-05-20

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Jerzy Tyszer:
A Multiple Fault-Tolerant Processor Network Architecture for Pipeline Computing. IEEE Trans. Computers 37(11): 1414-1418 (1988)

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