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"A Diagrammatic Approach to Multilevel Logic Synthesis."

Sheldon B. Akers Jr. (1965)

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DOI: 10.1109/PGEC.1965.263962

access: closed

type: Journal Article

metadata version: 2020-05-20

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Sheldon B. Akers Jr.:
A Diagrammatic Approach to Multilevel Logic Synthesis. IEEE Trans. Electron. Comput. 14(2): 174-181 (1965)

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