"C1C: A configurable, compiler-guided STT-RAM L1 cache."

Yong Li et al. (2013)

> Home

Details and statistics

DOI: 10.1145/2541228.2555308

access: open

type: Journal Article

metadata version: 2023-10-22

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/taco/LiZLCJ13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/taco/LiZLCJ13
Yong Li, Yaojun Zhang, Hai Li, Yiran Chen, Alex K. Jones:
C1C: A configurable, compiler-guided STT-RAM L1 cache. ACM Trans. Archit. Code Optim. 10(4): 52:1-52:22 (2013)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.