"Chip multi-processor scalability for single-threaded applications."

Neil Vachharajani et al. (2005)

> Home

Details and statistics

DOI: 10.1145/1105734.1105741

access: closed

type: Journal Article

metadata version: 2020-07-30

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/sigarch/VachharajaniIAVAC05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/sigarch/VachharajaniIAVAC05
Neil Vachharajani, Matthew Iyer, Chinmay Ashok, Manish Vachharajani, David I. August, Daniel A. Connors:
Chip multi-processor scalability for single-threaded applications. SIGARCH Comput. Archit. News 33(4): 44-53 (2005)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.