"An Efficient VLSI Architecture for Multi-Channel Spike Sorting Using a ..."

Ying-Lun Chen, Wen-Jyi Hwang, Chi-En Ke (2015)

> Home

Details and statistics

DOI: 10.3390/S150819830

access: open

type: Journal Article

metadata version: 2018-11-14

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - journals/sensors/ChenHK15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/sensors/ChenHK15
Ying-Lun Chen, Wen-Jyi Hwang, Chi-En Ke:
An Efficient VLSI Architecture for Multi-Channel Spike Sorting Using a Generalized Hebbian Algorithm. Sensors 15(8): 19830-19851 (2015)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.