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"A diagnosis method for single logic design errors in gate-level ..."

Atsushi Yoshikawa et al. (1997)

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DOI: 10.1002/(SICI)1520-684X(19970615)28:6<30::AID-SCJ4>3.0.CO;2-N

access: closed

type: Journal Article

metadata version: 2023-09-13

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  - journals/scjapan/YoshikawaKNK97
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  - https://dblp.org/rec/journals/scjapan/YoshikawaKNK97
Atsushi Yoshikawa, Seiji Kajihara, Masahiro Numa, Kozo Kinoshita:
A diagnosis method for single logic design errors in gate-level combinational circuits. Syst. Comput. Jpn. 28(6): 30-39 (1997)

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