"Performance enhancement of two-phase quasi-delay-insensitive circuits."

Hiroto Kagotani, Takashi Nanya (1996)

> Home

Details and statistics

DOI: 10.1002/SCJ.4690270504

access: closed

type: Journal Article

metadata version: 2023-09-13

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/scjapan/KagotaniN96
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/scjapan/KagotaniN96
Hiroto Kagotani, Takashi Nanya:
Performance enhancement of two-phase quasi-delay-insensitive circuits. Syst. Comput. Jpn. 27(5): 39-46 (1996)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.