"Microprocessor architecture utilizing redundant-binary operation."

Takahiro Irita et al. (1999)

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DOI: 10.1002/(SICI)1520-684X(19991130)30:13<106::AID-SCJ11>3.0.CO;2-4

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type: Journal Article

metadata version: 2023-09-13

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Takahiro Irita, Takayuki Ogura, Minoru Fujishima, Koichiro Hoh:
Microprocessor architecture utilizing redundant-binary operation. Syst. Comput. Jpn. 30(13): 106-115 (1999)

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