"Design of a low-power, high performance, 8×8 bit multiplier using a ..."

Chinnaiyan Senthilpari, Ajay Kumar Singh, Krishna M. Diwakar (2008)

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DOI: 10.1016/J.MEJO.2007.12.016

access: closed

type: Journal Article

metadata version: 2020-02-22

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Chinnaiyan Senthilpari, Ajay Kumar Singh, Krishna M. Diwakar:
Design of a low-power, high performance, 8×8 bit multiplier using a Shannon-based adder cell. Microelectron. J. 39(5): 812-821 (2008)

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