"Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process ..."

Xiaoyao Liang et al. (2008)

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DOI: 10.1109/MM.2008.12

access: closed

type: Journal Article

metadata version: 2017-05-20

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Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David M. Brooks:
Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability. IEEE Micro 28(1): 60-68 (2008)

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