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"Design of a soft error hardened SRAM cell with improved access time for ..."
V. K. Tomar, Ashish Sachdeva (2022)
- V. K. Tomar, Ashish Sachdeva
:
Design of a soft error hardened SRAM cell with improved access time for embedded systems. Microprocess. Microsystems 90: 104445 (2022)

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