"Modular vector processor architecture targeting at data-level parallelism."

Seyed A. Rooholamin, Sotirios G. Ziavras (2015)

> Home

Details and statistics

DOI: 10.1016/J.MICPRO.2015.04.007

access: closed

type: Journal Article

metadata version: 2020-02-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/mam/RooholaminZ15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/mam/RooholaminZ15
Seyed A. Rooholamin, Sotirios G. Ziavras:
Modular vector processor architecture targeting at data-level parallelism. Microprocess. Microsystems 39(4-5): 237-249 (2015)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.