default search action
"Fast and efficient FPGA implementation of Polar Codes and SoC test bench."
Federico G. Krasser et al. (2021)
- Federico G. Krasser, Mónica C. Liberatori, Leonardo Coppolillo, Leonardo J. Arnone, Jorge Castiñeira Moreira:
Fast and efficient FPGA implementation of Polar Codes and SoC test bench. Microprocess. Microsystems 84: 104264 (2021)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.