"A two stage pipeline architecture for hardware implementation of ..."

Praveen Kumar Kasetty, Aniruddha Kanhe (2024)

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DOI: 10.1016/J.MICPRO.2024.105064

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type: Journal Article

metadata version: 2024-07-19

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Praveen Kumar Kasetty, Aniruddha Kanhe:
A two stage pipeline architecture for hardware implementation of multi-level decomposition of 1-D framelet transform. Microprocess. Microsystems 108: 105064 (2024)

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