"Low power noise immune node voltage comparison keeper design for high ..."

R. Kannan, R. Rangarajan (2020)

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DOI: 10.1016/J.MICPRO.2020.103192

access: closed

type: Journal Article

metadata version: 2020-10-08

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R. Kannan, R. Rangarajan:
Low power noise immune node voltage comparison keeper design for high speed architectures. Microprocess. Microsystems 77: 103192 (2020)

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