"Evaluation of low power consumption network on chip routing architecture."

T. S. Arulananth et al. (2021)

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DOI: 10.1016/J.MICPRO.2020.103809

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type: Journal Article

metadata version: 2024-10-06

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T. S. Arulananth, Manickam Baskar, Udhaya Sankar S. M, R. Thiagarajan, G. Arul Dalton, Pasupuleti Raja Rajeshwari, Aruru Sai Kumar, Suresh A:
Evaluation of low power consumption network on chip routing architecture. Microprocess. Microsystems 82: 103809 (2021)

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