"A novel power efficient 0.64-GFlops fused 32-bit reversible floating point ..."

A. V. AnanthaLakshmi, Gnanou Florence Sudha (2017)

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DOI: 10.1016/J.MICPRO.2017.01.002

access: closed

type: Journal Article

metadata version: 2020-02-22

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A. V. AnanthaLakshmi, Gnanou Florence Sudha:
A novel power efficient 0.64-GFlops fused 32-bit reversible floating point arithmetic unit architecture for digital signal processing applications. Microprocess. Microsystems 51: 366-385 (2017)

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