"Translation of VHDL for logic synthesis."

M. S. Abrahams, A. Rushton (1994)

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DOI: 10.1016/0141-9331(94)90093-0

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type: Journal Article

metadata version: 2020-02-22

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M. S. Abrahams, A. Rushton:
Translation of VHDL for logic synthesis. Microprocess. Microsystems 18(8): 459-467 (1994)

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