default search action
"An 8K H.265/HEVC Video Decoder Chip With a New System Pipeline Design."
Dajiang Zhou et al. (2017)
- Dajiang Zhou, Shihao Wang, Heming Sun, Jian-Bin Zhou, Jiayi Zhu, Yijin Zhao, Jinjia Zhou, Shuping Zhang, Shinji Kimura, Takeshi Yoshimura, Satoshi Goto:
An 8K H.265/HEVC Video Decoder Chip With a New System Pipeline Design. IEEE J. Solid State Circuits 52(1): 113-126 (2017)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.