"90-nm process-variation adaptive embedded SRAM modules with ..."

Masanao Yamaoka et al. (2006)

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DOI: 10.1109/JSSC.2006.869786

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type: Journal Article

metadata version: 2022-01-03

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Masanao Yamaoka, Noriaki Maeda, Yoshihiro Shinozaki, Yasuhisa Shimazaki, Koji Nii, Shigeru Shimada, Kazumasa Yanagisawa, Takayuki Kawahara:
90-nm process-variation adaptive embedded SRAM modules with power-line-floating write technique. IEEE J. Solid State Circuits 41(3): 705-711 (2006)

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