"An experimental soft-error-immune 64-kbit 3-ns ECL bipolar RAM."

Kunihiko Yamaguchi et al. (1989)

> Home

Details and statistics

DOI: 10.1109/JSSC.1989.572620

access: closed

type: Journal Article

metadata version: 2024-11-12

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/YamaguchiNKHNOUO89
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/YamaguchiNKHNOUO89
Kunihiko Yamaguchi, Hiroaki Nanbu, Kazuo Kanetani, Noriyuki Homma, Tohru Nakamura, Kenichi Ohhata, Akihisa Uchida, Katsumi Ogiue:
An experimental soft-error-immune 64-kbit 3-ns ECL bipolar RAM. IEEE J. Solid State Circuits 24(5): 1390-1396 (1989)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.